Semiconductor microprocessors and large scale integrated circuits are manufactured by integrating elements such as a metal-oxide-semiconductor field effect transistor (hereinafter referred to as “MOSFET”) on a semiconductor substrate. Generally, a complementary MOSFET (hereinafter referred to as “CMOS”) is a basic element (switch elements) of such integrated circuits. As the material for the semiconductor substrate, silicon which is group IV semiconductor is mainly used. The integration density and the performance of a semiconductor microprocessor and a large scale integrated circuit can be improved by reducing the size of the transistor making up a CMOS.
A MOSFET which uses a III-V compound semiconductor instead of silicon (hereinafter referred to as “III-V compound semiconductor MOSFET”) has also been developed. In such a III-V compound semiconductor MOSFET, defects specific to the chemical bonding state may be formed at the interface between the III-V compound semiconductor and the oxide film, and the interface level may be highly densely introduced. For this reason, performance enhancement of the III-V compound semiconductor MOSFET has been difficult.
In recent years, however, development of the techniques of atomic layer deposition (ALD) of oxide materials has made it possible to fabricate a III-V compound semiconductor MOSFET in which the interface level density is small to a certain degree. As techniques for reducing the interface level density, surface treatment using sulfide aqueous solution, surface etching, introduction of an intermediate layer, use of a different kind of oxides have been proposed for example (see, for example, Non-PTLs 1 to 4).